View GS71108SJ_225199.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

GS71108ATP/J/SJ/U SOJ, TSOP, FP-BGA Commercial Temp Industrial Temp Features
* Fast access time: 7, 8, 10, 12 ns * CMOS low power operation: 140/120/95/80 mA at minimum cycle time * Single 3.3 V power supply * All inputs and outputs are TTL-compatible * Fully static operation * Industrial Temperature Option: -40 to 85C * Package line up J: 400 mil, 32-pin SOJ package TP: 400 mil, 32-pin TSOP Type II package SJ: 300 mil, 32-pin SOJ package U: 6 mm x 8 mm Fine Pitch Ball Grid Array package
128K x 8 1Mb Asynchronous SRAM
A3 A2 A1 A0 CE DQ1 DQ2 VDD VSS DQ3 DQ4 WE A16 A15 A14 A13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
7, 8, 10, 12 ns 3.3 V VDD Center VDD and VSS
32 31 30 29 A4 A5 A6 A7 OE DQ8 DQ7 VSS VDD DQ6 DQ5 A8 A9 A10 A11 A12
SOJ & TSOP-II 128K x 8-Pin Configuration
32-pin 400 mil SOJ & 300 mil SOJ & 400 mil TSOP II
28 27 26 25 24 23 22 21 20 19 18 17
Description
The GS71108A is a high speed CMOS Static RAM organized as 131,072 words by 8 bits. Static design eliminates the need for external clocks or timing strobes. The GS operates on a single 3.3 V power supply and all inputs and outputs are TTLcompatible. The GS71108A is available in a 6 mm x 8 mm Fine Pitch BGA package, as well as in 300 mil and 400 mil SOJ and 400 mil TSOP Type-II packages.
Packages J, TP, and SJ
Fine Pitch BGA 128K x 8-Bump Configuration
1 A NC DQ1 DQ2 VSS VDD DQ3 DQ4 NC 2 OE NC NC NC NC NC NC A10 3 A2 A1 A0 NC NC A14 A15 A16 4 A6 A5 A4 A3 NC A11 A12 A13 5 A7 CE NC NC NC DQ5 WE A9 6 NC DQ8 DQ7 VDD VSS DQ6 A8 NC
Pin Descriptions Symbol
A0-A16 DQ1-DQ8 CE WE OE VDD VSS NC
Description
Address input Data input/output Chip enable input Write enable input Output enable input +3.3 V power supply Ground No connect
B C D E F G H
Package U 6 mm x 8 mm, 0.75 mm Bump Pitch Top View
Rev: 1.04a 10/2002
1/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108ATP/J/SJ/U Block Diagram
A0 Address Input Buffer
Row Decoder
Memory Array
A16 CE WE OE
Column Decoder
Control
I/O Buffer
DQ1
DQ8
Truth Table
CE
H L L L Note: X: "H" or "L"
OE
X L X H
WE
X H L H
DQ1 to DQ8
Not Selected Read Write High Z
VDD Current
ISB1, ISB2
IDD
Rev: 1.04a 10/2002
2/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108ATP/J/SJ/U Absolute Maximum Ratings
Parameter
Supply Voltage Input Voltage Output Voltage Allowable power dissipation Storage temperature
Symbol
VDD VIN VOUT PD TSTG
Rating
-0.5 to +4.6 -0.5 to VDD +0.5 ( 4.6 V max.) -0.5 to VDD +0.5 ( 4.6 V max.) 0.7 -55 to 150
Unit
V V V W
oC
Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Recommended Operating Conditions
Parameter
Supply Voltage for -7/-8/-10/-12 Input High Voltage Input Low Voltage Ambient Temperature, Commercial Range Ambient Temperature, Industrial Range
Symbol
VDD VIH VIL TAc TAI
Min
3.0 2.0 -0.3 0 -40
Typ
3.3 -- -- -- --
Max
3.6 VDD +0.3 0.8 70 85
Unit
V V V
o
C
oC
Notes: 1. Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns. 2. Input undershoot voltage should be greater than -2 V and not exceed 20 ns.
Rev: 1.04a 10/2002
3/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108ATP/J/SJ/U Capacitance
Parameter
Input Capacitance Output Capacitance
Symbol
CIN COUT
Test Condition
VIN = 0 V VOUT = 0 V
Max
5 7
Unit
pF pF
Notes: 1. Tested at TA = 25C, f = 1 MHz 2. These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics
Parameter
Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage
Symbol
IIL ILO VOH VOL
Test Conditions
VIN = 0 to VDD Output High Z VOUT = 0 to VDD IOH = -4 mA ILO = +4 mA
Min
-1 uA -1 uA 2.4 --
Max
1 uA 1 uA -- 0.4 V
Power Supply Currents
Parameter Symbol Test Conditions
CE VIL All other inputs VIH or VIL Min. cycle time IOUT = 0 mA CE VIH All other inputs VIH or VIL Min. cycle time CE VDD - 0.2 V All other inputs VDD - 0.2 V or 0.2 V
0 to 70C 7 ns 8 ns 10 ns 12 ns 7 ns
-40 to 85C 8 ns 10 ns 12 ns
Operating Supply Current
IDD
140 mA 120 mA
95 mA
80 mA
145 mA
125 mA 100 mA
85 mA
Standby Current
ISB1
25 mA
20 mA
20 mA
15 mA
30 mA
25 mA
25 mA
20 mA
Standby Current
ISB2
2 mA
5 mA
Rev: 1.04a 10/2002
4/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108ATP/J/SJ/U AC Test Conditions
Parameter
Input high level Input low level Input rise time Input fall time Input reference level Output reference level Output load
Conditions
VIH = 2.4 V VIL = 0.4 V tr = 1 V/ns tf = 1 V/ns 1.4 V 1.4 V Fig. 1& 2
Output Load 1
DQ 50 VT = 1.4 V 30pF1
Output Load 2
3.3 V DQ 5pF1 589 434
Note: 1. Include scope and jig capacitance. 2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted. 3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ
AC Characteristics
Read Cycle
Parameter Read cycle time Address access time Chip enable access time (CE) Output enable to output valid (OE) Output hold from address change Chip enable to output in low Z (CE) Output enable to output in low Z (OE) Chip disable to output in High Z (CE) Output disable to output in High Z (OE) Symbol tRC tAA tAC tOE tOH tLZ* tOLZ* tHZ* tOHZ* -7 Min 7 -- -- -- 3 3 0 -- -- Max -- 7 7 3 -- -- -- 3.5 3 Min 8 -- -- -- 3 3 0 -- --
-8
Max -- 8 8 3.5 -- -- -- 4 3.5 Min 10 -- -- -- 3 3 0 -- --
-10 Max -- 10 10 4 -- -- -- 5 4 Min 12 -- -- -- 3 3 0 -- --
-12 Max -- 12 12 5 -- -- -- 6 5
Unit ns ns ns ns ns ns ns ns ns
* These parameters are sampled and are not 100% tested
Rev: 1.04a 10/2002
5/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108ATP/J/SJ/U
Read Cycle 1: CE = OE = VIL, WE = VIH
tRC Address tAA tOH Data Out Previous Data Data valid
Read Cycle 2: WE = VIH
tRC Address tAA CE tAC tLZ OE tOE Data Out tOLZ High impedance
DATA VALID
tHZ
tOHZ
Rev: 1.04a 10/2002
6/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108ATP/J/SJ/U
Write Cycle
Parameter Write cycle time Address valid to end of write Chip enable to end of write Data set up time Data hold time Write pulse width Address set up time Write recovery time (WE) Write recovery time (CE) Output Low Z from end of write Write to output in High Z Symbol tWC tAW tCW tDW tDH tWP tAS tWR tWR1 tWLZ* tWHZ* -7 Min 7 5 5 3 0 5 0 0 0 3 -- Max -- -- -- -- -- -- -- -- -- -- 3 Min 8 5.5 5.5 4 0 5.5 0 0 0 3 -- -8 Max -- -- -- -- -- -- -- -- -- -- 3.5 Min 10 7 7 5 0 7 0 0 0 3 -- -10 Max -- -- -- -- -- -- -- -- -- -- 4 Min 12 8 8 6 0 8 0 0 0 3 -- -12 Max -- -- -- -- -- -- -- -- -- -- 5 Unit ns ns ns ns ns ns ns ns ns ns ns
* These parameters are sampled and are not 100% tested
Rev: 1.04a 10/2002
7/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108ATP/J/SJ/U
Write Cycle 1: WE control
tWC Address tAW OE tCW CE tAS WE tDW Data In tWHZ Data Out
HIGH IMPEDANCE DATA VALID
tWR
tWP tDH
tWLZ
Write Cycle 2: CE control
tWC Address tAW OE tAS CE tWP WE tDW Data In Data Out
DATA VALID
tWR1
tCW
tDH
HIGH IMPEDANCE
Rev: 1.04a 10/2002
8/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108ATP/J/SJ/U
32-Pin SOJ, 400 mil
Symbol D L c E HE GE A A1 A2 B B1 e
A
Dimension in inch min -- 0.026 0.105 0.013 0.024 0.006 0.820 0.395 -- 0.430 0.354 0.082 -- 0o nom -- -- 0.110 0.017 0.028 0.008 0.824 0.400 0.05 0.435 0.366 -- -- -- max 0.146 -- 0.115 0.021 0.032 0.012 0.829 0.405 -- 0.440 0.378 -- 0.004 10o
Dimension in mm min -- 0.66 2.67 0.33 0.61 0.15 20.83 10.04 -- 10.93 9.00 2.08 -- 0o nom -- -- 2.80 0.43 0.71 0.20 20.93 10.16 1.27 11.05 9.30 -- -- -- max 3.70 -- 2.92 0.53 0.81 0.30 21.06 10.28 -- 11.17 9.60 -- 0.10 10o
1
c D E
A
A2
A1
y
B B1
e HE Detail A Q GE L y Q
Notes: 1. Dimension D& E do not include interlead flash. 2. Dimension B1 does not include dambar protrusion/intrusion. 3. Controlling dimension: inches
Rev: 1.04a 10/2002
9/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108ATP/J/SJ/U
32-Pin TSOP-II, 400mil
D Symbol A A1 E1 E
A
32
c
Dimension in inch min 0.039 0.002 0.037 0.012 0.0047 0.820 -- 0.455 0.395 -- 0.017 0.024 0.00 0o nom -- -- 0.040 0.016 0.0051 0.825 0.037 0.463 0.400 0.05 0.020 0.031 -- -- max 0.05 0.006 0.045 0.018 0.0062 0.830 -- 0.471 0.405 -- 0.023 0.039 0.003 5o
Dimension in mm min -- 0.01 0.90 0.30 0.12 20.82 -- 11.56 10.03 -- 0.40 0.60 0.00 0o nom -- -- 1.02 0.40 0.13 20.95 0.95 11.76 10.16 1.27 0.50 0.80 -- -- max 1.27 0.15 1.14 0.45 0.16 21.08 -- 11.96 10.29 -- 0.60 1.00 0.76 5o
A2 b c
1 ZD A2 A
e
b
D ZD E E1
A1
y L1 L
e L L1 y Q
Detail A
Q
Notes: 1.Dimension D includes mold flash, protrusions or gate burrs. 2. Dimension E does not include interlead flash 3. Controlling dimension: mm
Rev: 1.04a 10/2002
10/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108ATP/J/SJ/U 6 mm x 8 mm Fine Pitch BGA
8.00 0.10 6.00 0.10 0.22 0.05 3 2 1 6 0.75(typ).
11/14 (c) 2001, Giga Semiconductor, Inc.
Top View
1.20(max)
pin A1 index
Bottom View
pin A1 index
5
4
Rev: 1.04a 10/2002
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Ball Dia. 0.35 Pitch 0.75
3.75 5.25
0.36(typ)
0.10
G
D
C
H
A
B
E
F
D
units: mm
GS71108ATP/J/SJ/U
Ordering Information Part Number*
GS71108ATP-7 GS71108ATP-8 GS71108ATP-10 GS71108ATP-12 GS71108ATP-7I GS71108ATP-8I GS71108ATP-10I GS71108ATP-12I GS71108ASJ-7 GS71108ASJ-8 GS71108ASJ-10 GS71108ASJ-12 GS71108ASJ-7I GS71108ASJ-8I GS71108ASJ-10I GS71108ASJ-12I GS71108AJ-7 GS71108AJ-8 GS71108AJ-10 GS71108AJ-12 GS71108AJ-7I GS71108AJ-8I GS71108AJ-10I GS71108AJ-12I
Package
400 mil TSOP-II 400 mil TSOP-II 400 mil TSOP-II 400 mil TSOP-II 400 mil TSOP-II 400 mil TSOP-II 400 mil TSOP-II 400 mil TSOP-II 300 mil SOJ 300 mil SOJ 300 mil SOJ 300 mil SOJ 300 mil SOJ 300 mil SOJ 300 mil SOJ 300 mil SOJ 400 mil SOJ 400 mil SOJ 400 mil SOJ 400 mil SOJ 400 mil SOJ 400 mil SOJ 400 mil SOJ 400 mil SOJ
Access Time
7 ns 8 ns 10 ns 12 ns 7 ns 8 ns 10 ns 12 ns 7 ns 8 ns 10 ns 12 ns 7 ns 8 ns 10 ns 12 ns 7 ns 8 ns 10 ns 12 ns 7 ns 8 ns 10 ns 12 ns
Temp. Range
Commercial Commercial Commercial Commercial Industrial Industrial Industrial Industrial Commercial Commercial Commercial Commercial Industrial Industrial Industrial Industrial Commercial Commercial Commercial Commercial Industrial Industrial Industrial Industrial
Status
Rev: 1.04a 10/2002
12/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108ATP/J/SJ/U
Ordering Information Part Number*
GS71108AU-7 GS71108AU-8 GS71108AU-10 GS71108AU-12 GS71108AU-7I GS71108AU-8I GS71108AU-10I GS71108AU-12I
*
Package
6 mm x 8 mm Fine Pitch BGA 6 mm x 8 mm Fine Pitch BGA 6 mm x 8 mm Fine Pitch BGA 6 mm x 8 mm Fine Pitch BGA 6 mm x 8 mm Fine Pitch BGA 6 mm x 8 mm Fine Pitch BGA 6 mm x 8 mm Fine Pitch BGA 6 mm x 8 mm Fine Pitch BGA
Access Time
7 ns 8 ns 10 ns 12 ns 7 ns 8 ns 10 ns 12 ns
Temp. Range
Commercial Commercial Commercial Commercial Industrial Industrial Industrial Industrial
Status
Customers requiring delivery in Tape and Reel should add the character "T" to the end of the part number. For example: GS71108ATP-8T
Rev: 1.04a 10/2002
13/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108ATP/J/SJ/U 1Mb Asynchronous Datasheet Revision History
Rev. Code: Old; New
71108A_r1 71108A_r1; 71108A_r1_01 71108A_r1_01; 71108A _r1_02 71108A_r1_02; 71108A _r1_03 71108A_r1_03; 71108A _r1_04 Content Content Content Content
Types of Changes Format or Content
Page #/Revisions/Reason
* Creation of new datasheet * Added 6 ns speed bin to entire document * Updated all power numbers * Changed 6 mm x 10 mm package designator from U to X * Updated Recommended Operating Conditions table on page 3 * Updated Power Supply Currents table * Changed FPBGA package from 6 x 10 to 6 x 8 (package U) * Removed 6 ns speed bin from entire document * Added 7 ns speed bin to entire document
Rev: 1.04a 10/2002
14/14
(c) 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

▲Up To Search▲

Price & Availability of GS71108SJ

	To Download GS71108SJ Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .